NCTU Course Number
5040
Introductions
This course aims to convey the senior and graudated EE students techniques to design the VLSI chips using state-of-the-art CAD tools. In addition to learning CAD tools for performance-driven and cost-effective IC designs, a top-down design flow and related environment will also be addressed. Upon completion of the course, the student will be able to design the integrated circuits and systems based on standard cell library as well as full-custom layout approaches. As such he/she will be able to work in a team of designers or stand alone.
Content
The course starts from system design specs of an application which demands the need of developing specific hardwares or application specific integrated circuits (ASIC) or application processors. Then followed by the presentation of architectural proposals, an optimal architecture leading to performance-driven and cost-effective realization can be derived based on both sampling rate and system clock rate. With the support of Verilog-HDL, designers can describe their designs either in behavioral level or structural level. Before going down to the lower level design, one has to do initial floorplan to estimate both routing style and module aspect ratio which provide some area constraints for later designs. Then the partitioned blocks can be conducted hierarchically and with the support of synthesis as well as P&R routing tools, physical layout can easily be achieved if cell-based design approach is exploited. Finally through layout verification and post-layout simulation, the design can be verified before fabrication.
Reference Book
[1] M.J.S. Smith, "Application-Specific Integrated Circuits," from University of Hawaii, Addison-Wesley, 1997, ISBN 0-201-50022-1. This book covers a lot of design issues and related CAD tools which may interest readers and provide many details for reference.
[2] N.H. Weste and K. Eshraghian, "Principles of CMOS VLSI Design -- A Systems Perspective," 2nd Edition from Addison-Wesley Publishing Company, ISBN 0-201-53376-6.
Instructor
Prof. Chen-Yi Lee 李鎮宜(Office: ED538, Ext: 31849)
TA
| Account | Name | Ext. | Office | Office Hour | |
| Iclabt01 | 李人偉(Jen-Wei Lee) | jenweilee@gmail.com | 54238 | ED430 | 3GH |
| Iclabt02 | 蕭如宏(Ju-Hung Hsiao) | ju0909@si2lab.org | 54238 | ED430 | 3GH |
| Iclabt03 | 許智翔(Chih-Hsiang Hsu) | chhsu@si2lab.org | 54238 | ED430 | 3GH |
| Iclabt04 | 范期赫(Chi-He Fan) | open@si2lab.org | 54238 | ED430 | 1GH |
| Iclabt05 | 凃淑文(Shu-Wen Tu) | pipytu@si2lab.org | 54238 | ED430 | 1GH |
| Iclabt06 | 傅星萍(Hsing-Ping Fu) | irvetta@gmail.com | 54246 | ED317A | 3GH |
| Iclabt07 | 朱家慶(Chia-Ching Chu) | dream3032000@yahoo.com.tw | 54238 | ED430 | 3GH |
Question or Help Requirement on Labs
If there is any question for Labs, please find the help by sending Email to TAs or posting on the telnet://kulu.twbbs.org (EE_iclab) and NCTU e-campus.
Classroom
The first class of ICLAB opening is hold at ED301, and then we'll move to ED415 after.
Grading Criterion
| Item | Times | Ratio |
| Weekly exercises | 12 | 60% |
| Homework | 2 | 15% |
| Online tests | 2 | 10% |
| Final Project | 1 | 15% |
Demo Time
Grade
Course Schedule
| Date | Content | Item | File |
| 2011/02/23 | Opening@ED301 Announce ICLAB policy Sign technology contract |
Slide Course Policy Course Content |
ICLAB_Spring_2011.pdf ICLAB_course_policy.pdf ICLAB_course_content.pdf |
| 2011/03/02 | Oral tutorial: Structural Arithmetic Design@ED415 Release exercise: LAB01(one week) Fill demo period list |
Lec. Slide Exercise Example |
Lec01_HDL_I.pdf Lab01_Exercise.pdf Lab01_Example.pdf |
| 2011/03/07 | 1st demo of LAB01@TA office | ||
| 2011/03/09 | Oral tutorial: Combinational Logic Design@ED415 2nd demo of LAB01@TA office Release exercise: LAB02(one week) |
Lec. Slide Exercise Example |
Lec02_HDL_II.pdf Lab02_Exercise.pdf Lab02_Example.pdf |
| 2011/03/14 | 1st demo of LAB02@TA office | ||
| 2011/03/16 | Oral tutorial: Sequential Logics Design@ED415 2nd demo of LAB02@TA office Release exercise: LAB03(one week) |
Lec. Slide Exercise Example |
Lec03_HDL_II.pdf Lab03_Exercise.pdf Lab03_Example.pdf |
| 2011/03/21 | 1st demo of LAB03@TA office | ||
| 2011/03/23 (IC contest) |
2nd demo of LAB03 by sending mail to TA | ||
| 2011/03/30 | Oral tutorial: Timing Analysis, Finite State Machine, Design Ware@ED415 Release exercise: LAB04(one week) |
Lec. Slide Exercise Example |
Lec04_Advance_I.pdf Lab04_Exercise.pdf Lab04_Example.pdf |
| 2011/04/04 (Holiday) |
1st demo of LAB04 by sending mail to TA | ||
| 2011/04/06 (Holiday) |
Release homework: HW1(three weeks) 2nd demo of LAB04 by sending mail to TA |
Homework 1 | HW1.pdf |
| 2011/04/11 | |||
| 2011/04/13 | Oral tutorial: Test Bench Programming and Macro Behavior@ED415 Release exercise: LAB05(one week) |
Lec. Slide Exercise Example Document |
Lec05_Advance_II.pdf Lab05_Exercise.pdf Lab05_Example.pdf MEM_1024.pdf |
| 2011/04/18 (Midterm week) |
1st demo of LAB05@TA office | ||
| 2011/04/20 (Midterm week) |
1st On-line test@ED415 2nd demo of LAB05@TA office (after on-line test) |
Material Demo Record |
OT1.pdf OT1_DEMO.xlsx |
| 2011/04/27 | Oral tutorial: Introduction to Synthesis Flow@ED415 Release exercise: LAB06(one week) 1st demo of HW1 Release final project: FP(two months) |
FP Material Lec. Slide Exercise Example |
Final_Project.pdf Lec06_Synthesis_I.pdf Lab06_Exercise.pdf Lab06_Example.pdf |
| 2011/05/02 | 1st demo of LAB06@TA office | ||
| 2011/05/04 | Oral tutorial: Advanced Timing Optimization and Analysis@ED415 Release exercise: LAB07(one week) 2nd demo of LAB06@TA office 2nd demo of HW1@TA office |
Lec. Slide Exercise Example |
Lec07_Synthesis_II.pdf Lab07_Exercise.pdf Lab07_Example_01.pdf Lab07_Example_02.pdf |
| 2011/05/09 | 1st demo of LAB07@TA office | ||
| 2011/05/11 | Oral tutorial: Low Power Design Methodologies@ED415 2nd demo of LAB07@TA office Release exercise: LAB08(one week) |
Lec. Slide Exercise Example |
Lec08_LowPower_Design.pdf Lab08_Exercise.pdf Lab08_Example.pdf |
| 2011/05/16 | 1st demo of LAB08@TA office | ||
| 2011/05/18 | Oral tutorial: Design for Testability@ED415 2nd demo of LAB08@TA office Released exercise: LAB09(one week) |
Lec. Slide Exercise Example |
Lec09_DFT.pdf Lab09_Exercise.pdf Roundkey.pdf |
| 2011/05/23 | 1st demo of LAB09@TA office | ||
| 2011/05/25 | Oral tutorial: Cell-based APR Design Flow@ED415 2nd demo of LAB09@TA office Release exercise: LAB10(one week) Release homework: HW2(one week) |
Lec. Slide Exercise Homework2 |
Lec10_APR_I.pdf Lab10_Exercise.pdf HW2.pdf |
| 2011/05/30 | 1st demo of LAB10@TA office | ||
| 2011/06/01 | Oral tutorial: Post-Layout Power Simulation, Post-Layout Verifications@ED415 2nd demo of LAB10@TA office Release exercise: LAB11(one week) 1st demo of HW2@TA office |
Lec. Slide Exercise Document |
Lec11_APR_II.pdf Lab11_Exercise.pdf RA1SH_512x8.pdf |
| 2011/06/06 (Holiday) |
1st demo of LAB11 by sending mail to TA | ||
| 2011/06/08 | Oral tutorial: Cell-based APR Flow with Customized Cell@ED415 2nd demo of LAB11@TA office Release exercise: LAB12(one week) 2nd demo HW2@TA office |
Lec. Slide Exercise |
Lec12_APR_III.pdf Lab12_Exercise.pdf |
| 2011/06/13 | 1st demo of LAB12@ TA office | ||
| 2011/06/15 | 2nd On-line test@ED415 2nd demo of LAB12@TA office (after on-line test) |
||
| 2011/06/22 (Final exam week) |
Demo FP by sending mail to TA Final project presentation@ED415 during 1:30~5:30pm |